Design Verification Intern

quadricquadricBurlingame, California, United States
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Posted

9/22/2026

Employment

Full time

Range

$50 - $57/hr

Work style

On-site

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AI summary

Core responsibilities

The intern will support the Design Verification team by documenting test plans and writing/debugging tests for the GPNPU architecture. They will collaborate closely with hardware architects and designers to ensure verification completeness and communicate technical findings.

Requirements overview

Candidates must be currently pursuing a Bachelor's, Master's, or PhD in Computer Science, Electrical Engineering, or a related field. Proficiency in SystemVerilog, SystemC, or C/C++ is required, along with familiarity with CPU or GPU verification methodologies.

Key skills

SystemVerilogSystemCC++Verification methodologiesCPU architectureGPU architectureTest planningDebuggingCoverage analysisRTL designPythonLLMsComputer architecturePerformance engineeringAssembly

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Education requirements

bachelor degreepostgraduate degree

About quadric

Industry

Semiconductor Manufacturing

Employees

73

Type

Privately Held

Size

51-200 employees

Quadric licenses an AI processor architecture optimized for on-device inference. Only the Quadric Chimera GPNPU (general purpose neural processing unit) delivers high AI/ML inference performance while also running C++ code without forcing the developer to artificially partition application code between two or three different processors. Quadric's Chimera GPNPU processor IP core scales from 1 to 864 TOPS and seamlessly intermixes scalar, vector and matrix code.

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Job categories

TechnologyEngineeringSoftware

Description

Quadric is redefining edge AI with the industry's first General Purpose Neural Processing Unit (GPNPU), enabling developers to run both neural network inference and conventional C++ code on a single programmable architecture. Our technology powers intelligent edge devices across automotive, industrial, robotics, and embedded systems. Founded in 2016 and based in downtown Burlingame, California, Quadric is building the world's first supercomputer designed for the real-time needs of edge devices. Quadric aims to empower developers in every industry with superpowers to create tomorrow's technology, today. The company was co-founded by technologists from MIT and Carnegie Mellon, who were previously the technical co-founders of the Bitcoin computing company 21. The Opportunity This is a chance to get hands-on experience verifying a next-generation processor architecture, working directly alongside our hardware team as we build supercomputer technology for the Edge. You'll support the Design Verification team in documenting test plans, writing and debugging tests, and generating coverage for Quadric's GPNPU — gaining exposure to real verification methodologies used on CPU and GPU-class designs, and working closely with the architects and designers who built them. Note: Our preference is for this internship to be based out of our Burlingame, California office. Candidates should be based in the Bay Area or able to relocate for the internship period and available to work on site. What You'll Do Support Verification Planning Collaborate with architects and designers to document test plans for the GPNPU. Write & Debug Tests Write and debug tests against the processor's architecture and micro-architecture. Generate and analyze coverage to help assess verification completeness. Collaborate Across the Team Work closely with hardware architects and designers to understand design intent and clarify verification requirements. Communicate findings, blockers, and technical questions clearly to the team. What Success Looks Like Within your internship, you'll: Build a working understanding of verification methodology for a CPU/GPU-class design. Contribute test plans, tests, and coverage that meaningfully support the team's verification effort. Develop hands-on fluency with SystemVerilog, SystemC, or C/C++ in a real verification environment. What We're Looking For Required Currently pursuing a Bachelor's, Master's, or PhD in Computer Science, Electrical Engineering, or a related field. Familiarity with verification methodologies for CPU or GPU designs. Proficient in either SystemVerilog, SystemC, or C/C++ (UVM is a plus). Prepared to collaborate with architects and designers to document test plans, write and debug tests, and generate coverage. Demonstrated capability in problem-solving, debugging, and clear technical communication. Preferred Coursework or project experience with computer architecture, RTL design, ML systems, or performance engineering. Exposure to assembly or low-level code generation. Adept with scripting languages like Python and using LLMs to get things done. What We Offer The hourly salary range for this temporary position is $50-57/hr . This range reflects the full span of levels and geographies at which Quadric hires for this role. The actual hourly salary offered will depend on a number of factors, including the specific level of the role, years and depth of relevant experience, technical skills and competencies. Quadric interns receive hands-on experience working alongside industry experts in AI and semiconductor technology, with access to mentorship and meaningful project ownership from day one along with following Catered lunch each day in our office Downtown Burlingame office location, close to shops, cafes, and local amenities A work culture focused on innovative disruption If this role resonates with you, we encourage you to apply even if your experience does not perfectly match every qualification. We value potential, curiosity, and a willingness to learn just as much as direct experience. Equal Employment Opportunity Quadric is an equal opportunity employer. We do not discriminate on the basis of race, color, religion, sex, national origin, age, disability, veteran status, sexual orientation, gender identity, marital status, medical condition, or any other characteristic protected by applicable federal, state, or local law E-Verify and Right to Work Notices Quadric participates in the E-Verify program to confirm employment eligibility for U.S.-based roles. As part of this process, applicants may review the following notices, which explain your rights and our participation in E-Verify. These notices are provided in English and Spanish. E-Verify Participation Notice (English | Spanish) Right to Work Notice (English | Spanish) No action is required from candidates during the application process. These notices are provided for informational purposes only. Privacy By submitting an application, you acknowledge that Quadric will collect and process your personal information as part of the hiring process. Please review our Privacy Policy to understand how we handle your data

Requirements

  • SystemVerilog
  • SystemC
  • C++
  • Verification methodologies
  • CPU architecture
  • GPU architecture
  • Test planning
  • Debugging
  • Coverage analysis
  • RTL design
  • Python
  • LLMs
  • Computer architecture
  • Performance engineering
  • Assembly

Benefits

  • Catered lunch
  • Mentorship
  • Project ownership

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