Digital IC Design Intern, MS - Summer 2027

Marvell TechnologyMarvell TechnologyIrvine, California, United States | Santa Clara, California, United States | Boise, Idaho, United States | Village of Woodbury, New York, United States | Austin, Texas, United States
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Posted

9/21/2026

Employment

Intern

Range

$35 - $70/hr

Work style

On-site

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AI summary

Core responsibilities

The intern will develop and verify high-performance RTL design blocks for high-speed connectivity devices and next-generation chips. They will also collaborate with cross-functional teams to conduct synthesis, timing analysis, and power analysis to ensure functional correctness.

Requirements overview

Candidates must be currently enrolled in a Master’s degree program in Electrical or Computer Engineering with an expected graduation between Fall 2027 and Summer 2028. Proficiency in programming languages like Python, Perl, or Tcl and experience with industry-standard design tools are required.

Key skills

Digital IC designRTL designVerilogPythonPerlTclStatic timing analysisSoC designASIC designVLSIDigital signal processingSynopsys PrimetimeCadence VirtuosoCadence Spectre XCircuit theoryComputer architecture

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Education requirements

postgraduate degree

About Marvell Technology

Industry

Semiconductor Manufacturing

Employees

10,924

Type

Public Company

Size

5,001-10,000 employees

We believe that infrastructure powers progress. That execution is as essential as innovation. That better collaboration builds better technology. At Marvell, we go all in with you. Focused and determined, we unite behind your goals as our own. We leverage our unrivaled portfolio of infrastructure technology to identify the best solution for your unique needs. And we sit shoulder-to-shoulder with your teams to build it. Agile in our thinking, and our partnerships, we look for unexpected connections that deliver a competitive edge and reveal new opportunities. At Marvell, we’re driven by the belief that how we do things matters just as much as what we do. Because, with a foundation built on partnership, anything is possible.

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Job categories

TechnologyEngineeringSoftwareData & Analytics

Description

About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Marvell’s Digital IC (or Digital Logic) Design teams span across multiple domains, giving you the opportunity to work on technologies that power next-generation cloud, AI, storage, and networking solutions. Some teams are responsible for the design and verification of high-performance Ethernet PHY chips. Other teams shape the micro-architecture of the blocks, accelerators and subsystems that make up a system-on-chip (SoC). Across all groups, you’ll collaborate with your direct team and cross-functional partners (across architecture, physical design, design verification, and more) to deliver robust, scalable solutions that enable Marvell’s leadership in data infrastructure. What You Can Expect Deep dive into the digital design and implementation of real chip design efforts Develop and verify detailed, high-performance RTL design blocks and apply the digital design specifications for high-speed connectivity devices and next-generation chips Conduct synthesis, static timing analysis, timing signoff, and power analysis Debug design issues and ensure functional correctness Investigate & execute new design techniques & flows, and explore emerging methodologies to improve design quality, efficiency, & productivity Collaborate with chip architecture, design verification, & physical design teams to solve complex problems and contribute to a team building real products What We're Looking For Currently enrolled in a Master’s Degree in Electrical Engineering, Computer Engineering, or a related field with an expected graduation date between Fall 2027 – Summer 2028 Completed courses focusing on circuit design, circuit theory, digital logic design, static timing analysis, computer architecture, Verilog, VLSI, digital signal processing (DSP), SoC/ASIC design, or electronics Proficiency in programming & scripting languages like Python, Perl, Tcl Experience using tools like Synopsys (Primetime), Cadence (Virtuoso & Spectre X), and Mentor Hands-on experience with RTL design and a firm understanding on how it integrates into the overall ASIC design flow Strong analysis, problem solving, and communication skills Expected Base Pay Range (USD) 35 - 70, $ per hour. The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions. Additional Compensation and Benefit Elements Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life’s most important moments. Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition. Highlights for our interns: medical, dental, and vision coverage, perks and discounts, robust mental health resources to prioritize emotional well-being, and paid holidays. Additional compensation may be available for intern PhD candidates. We look forward to sharing more with you during the interview process. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com. Interview Integrity To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews. These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process. This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment. #LI-TT1

Requirements

  • Digital IC design
  • RTL design
  • Verilog
  • Python
  • Perl
  • Tcl
  • Static timing analysis
  • SoC design
  • ASIC design
  • VLSI
  • Digital signal processing
  • Synopsys Primetime
  • Cadence Virtuoso
  • Cadence Spectre X
  • Circuit theory
  • Computer architecture

Benefits

  • Medical coverage
  • Dental coverage
  • Vision coverage
  • Mental health resources
  • Paid holidays
  • Perks and discounts

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