Physical Design Engineer Intern
Ambarella
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- Location
- United States
- Work style
- On-site
- Job type
- Full time, Internship
- Posted
- Oct 22
- 2 days ago
Career path
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About the company
Ambarella
Semiconductors · 501 to 1,000 employees
AI Vision Processors For Edge Applications Our solutions make cameras smarter by extracting valuable data from high-resolution video streams.
What you'll do
- Perform floor-planning
- Perform auto place and route
- Perform static timing analysis
- Implement ECOs
- Perform signal integrity analysis
- Perform EM/IR analysis
- Perform formal verification
- Perform physical layout verification (LVS/DRC/DFM)
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Read the full posting here
AI Vision Processors For Edge Applications
Our solutions make cameras smarter by extracting valuable data from high-resolution video streams.
Job Description
The Physical Design Engineer will be an integral part of the physical design team with all aspects of physical design implementation and verification tasks for Ambarella’s cutting edge low power AI SoC from Netlist to GDSII.
The Physical Design Engineer will be responsible for the following areas throughout all phase of SoC implementation process; floor-planning, auto place and route, static timing analysis, eco implementation, signal integrity analysis, EM/IR analysis, formal verification, and physical layout verification (LVS/DRC/DFM) at block and/or full chip level.