RTL Intern

EtchedEtchedSan Jose, California, United States
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Posted

9/18/2026

Employment

Intern

Range

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Work style

On-site

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AI summary

Core responsibilities

You will design microarchitecture and implement logic in Verilog while contributing to RTL block development. You will participate in the full design cycle, ranging from microarchitecture discussions to synthesis and timing feedback.

Requirements overview

Candidates should be pursuing a degree in electrical engineering, computer engineering, or a related field. Familiarity with high-speed digital logic, ASIC/SoC design concepts, and scripting languages like Python is required.

Key skills

RTL designVerilogSystemVerilogUVMPythonASIC designSoC designDigital logicVerificationTest benchesPhysical designMicroarchitectureMachine learningLLM architecturesNumerical representationsClocking and reset schemes

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Education requirements

bachelor degreepostgraduate degree

About Etched

Industry

Computer Hardware Manufacturing

Employees

544

Type

Privately Held

Size

51-200 employees

Frontier Inference Clusters

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Job categories

TechnologyEngineeringSoftwareData & Analytics

Description

About Etched Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history. Job Summary As an RTL Intern at Etched, you will help design microarchitecture and implement logic in verilog. You will work with cutting-edge machine learning architectures, contribute to RTL block development, and participate in the full design cycle—from microarchitecture discussions to synthesis and timing feedback. You do not necessarily need prior ML/AI hardware experience; just the ability to learn quickly in a fast-paced, high-autonomy environment. We are looking for Fall '26, Spring '27, and Summer '27 interns. You may be a good fit if you have Progress towards a Bachelor’s, Master’s, or PhD degree in electrical engineering, computer engineering, or a related field. Familiarity with high-speed digital logic Exposure to ASIC or SoC design concepts Familiarity with SystemVerilog, UVM, or Python Familiarity with verification work and writing test benches Familiarity with physical design flows and tooling Are able to learn quickly about transformers and other aspects of modern artificial intelligence Strong candidates may also have experience with Familiarity with modern ML and LLM model architectures Familiarity with numerical representations and functions Familiarity with clocking and reset schemes ​Ability to program with Python or another scripting language We encourage you to apply even if you do not believe you meet every single qualification. Program details 12-week paid internship Generous housing support for those relocating Daily lunch and dinner in our office Based at our office in San Jose, CA Direct mentorship from industry leaders and world-class engineers Opportunity to work on one of the most important problems of our time For any questions, contact internships@etched.com How we’re different Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors. We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.

Requirements

  • RTL design
  • Verilog
  • SystemVerilog
  • UVM
  • Python
  • ASIC design
  • SoC design
  • Digital logic
  • Verification
  • Test benches
  • Physical design
  • Microarchitecture
  • Machine learning
  • LLM architectures
  • Numerical representations
  • Clocking and reset schemes

Benefits

  • Paid internship
  • Housing support
  • Daily lunch
  • Daily dinner

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