LTD RET/OPC Design Rule and Technology Definition Engineer
Intel
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- Pay
- $149.6K to $284.6K
- a year
- Location
- Hillsboro, OR
- Work style
- On-site
- Job type
- Full time
- Posted
- Nov 3
- 1 day ago
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Career path
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About the company
Intel
Semiconductors · 10,001+ employees
Intel is in the middle of an exciting transformation, with a vision to create and extend computing technology to connect and enrich the lives of every person on Earth.
What you'll do
- Use current and future lithography manufacturing tools
- Drive Design and process Technology Co-optimization (DTCO)
- Drive Design For Yield (DFY)
- Enable advanced node definition
- Extend the limits of feature sizes that are patternable
What you need
- Bachelor's degree in a related field with 6+ years of professional experience
- Master's degree in a related field with 4+ years of professional experience
- Ph.D. in a related field with 2+ years of professional experience
- Experience with semiconductor industry technologies
- Experience with source control and repository management systems
- Knowledge of AI/LLM technologies
- Strong problem-solving skills
- Experience in the semiconductor industry (preferred)
Key skills
softwareautomation frameworksdata systemsstructured data modelsmetadata frameworksdatabasesGitGitLabGitHubdata pipelinesAPIsAI/LLM technologiesproblem-solving skillsphysical designdesign rule development
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Perks
- stock bonuses
- health
- retirement
- vacation
See full description on company page, apply now
Read the full posting here
Job Details:
Job Description:
Intel is in the middle of an exciting transformation, with a vision to create and extend computing technology to connect and enrich the lives of every person on Earth. Join LTD and help create the next generation of technologies that will touch the lives of people the world over for decades to come.
The RET DR and Tech Def team uses current and future lithography manufacturing tools to drive Design and process Technology Co-optimization (DTCO) as well as Design For Yield (DFY) to enable advanced node definition and extend the limits of feature sizes that are patternable by Intel Foundry for semiconductor devices.
Qualifications:
Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.
Minimum Qualifications
Bachelor's degree in Computer Science, Software Engineering, Electrical Engineering, or a related field with 6+ years of professional experience with semiconductor industry technologies
OR
Master's degree in Computer Science, Software Engineering, Electrical Engineering, or a related field with 4+ years of professional experience with semiconductor industry technologies
OR
Ph.D. in Computer Science, Software Engineering, Electrical Engineering, or a related field with 2+ years of professional experience with semiconductor industry technologies
Professional hands-on experience with semiconductor industry technologies includes one or more of the following:
Experience developing software, automation frameworks, data systems, or engineering infrastructure in a technical environment
Experience designing and maintaining structured data models, metadata frameworks, databases, knowledge repositories, or configuration-managed data systems.
Experience with source control and repository management systems (Git, GitLab, GitHub, or equivalent).
Experience developing automation workflows, APIs, data pipelines, or software tools used by engineering teams.
Knowledge of AI/LLM technologies and their application to engineering knowledge management, data extraction, workflow automation, and decision support.
Strong problem-solving skills and ability to work across multiple technical disciplines. Highly motivated to improve Intel quality and in achieving customer trust.
Preferred Qualifications
Experience in the semiconductor industry
Understanding of semiconductor physical design, layout methodologies, or design rule development
Experience working with process design rules, patterning technologies, or DTCO methodologies
Experience developing data and automation platforms that support semiconductor technology development
Experience with graph databases, knowledge graphs, semantic search, vector databases, or AI-enabled knowledge repositories.
Familiarity with cloud-native software development, data orchestration frameworks, and modern software engineering practices
For information on Intel’s immigration sponsorship guidelines, please see Intel U.S. Immigration Sponsorship Information
Job Type:
Experienced Hire
Shift:
Shift 1 (United States of America)
Primary Location:
US, Oregon, Hillsboro
Additional Locations:
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust
N/A
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel .
Annual Salary Range for jobs which could be performed in the US: $149,600.00-284,580.00 USD
The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.
*
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.